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Microchip Technology /ATSAMD21J17A /TCC0 /CTRLA

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Interpret as CTRLA

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (SWRST)SWRST 0 (ENABLE)ENABLE 0 (NONE)RESOLUTION 0 (DIV1)PRESCALER 0 (RUNSTDBY)RUNSTDBY 0 (GCLK)PRESCSYNC 0 (ALOCK)ALOCK 0 (CPTEN0)CPTEN0 0 (CPTEN1)CPTEN1 0 (CPTEN2)CPTEN2 0 (CPTEN3)CPTEN3

PRESCALER=DIV1, PRESCSYNC=GCLK, RESOLUTION=NONE

Description

Control A

Fields

SWRST

Software Reset
ENABLE

Enable
RESOLUTION

Enhanced Resolution

0 (NONE): Dithering is disabled

1 (DITH4): Dithering is done every 16 PWM frames

2 (DITH5): Dithering is done every 32 PWM frames

3 (DITH6): Dithering is done every 64 PWM frames
PRESCALER

Prescaler

0 (DIV1): No division

1 (DIV2): Divide by 2

2 (DIV4): Divide by 4

3 (DIV8): Divide by 8

4 (DIV16): Divide by 16

5 (DIV64): Divide by 64

6 (DIV256): Divide by 256

7 (DIV1024): Divide by 1024
RUNSTDBY

Run in Standby
PRESCSYNC

Prescaler and Counter Synchronization Selection

0 (GCLK): Reload or reset counter on next GCLK

1 (PRESC): Reload or reset counter on next prescaler clock

2 (RESYNC): Reload or reset counter on next GCLK and reset prescaler counter
ALOCK

Auto Lock
CPTEN0

Capture Channel 0 Enable
CPTEN1

Capture Channel 1 Enable
CPTEN2

Capture Channel 2 Enable
CPTEN3

Capture Channel 3 Enable

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Register License

Copyright © 2018 Microchip Technology Inc.

SPDX-License-Identifier: Apache-2.0

Licensed under the Apache License, Version 2.0 (the “License”); you may not use this file except in compliance with the License. You may obtain a copy of the License at

http://www.apache.org/licenses/LICENSE-2.0

Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an “AS IS” BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License.

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data